ASICs, DMMs, EEPROMS, FPGA emulation, Microcontrollers, Oscilloscopes, System on Chips
Subjects
ASIC validation, GPU kernel development, Hardware abstraction/driver development,HPC/GPU architecture, Pre-silicon validation, System Level Test development
2018Achieved second position ($100.00) in ex Battle of Ideas (Ryerson) out of 38 competitors
2018Awarded Bravo! (Celestica performance award) for delivering on aggressive timelines and project management skills
Education
Overview of my post-secondary education
Bachelor of Engineering (B.Eng)
September 2014 - May 2019
Through my B.Eng at TMU (formerly Ryerson University), I gained in-depth theoretical knowledge on a variety of topics. This, coupled with hands-on, practical experience of working in laboratories has enabled me to contribute towards the success of my employers and personal projects. The focus of specialization was Embedded Systems and Systems on Chips.
Relevant Courses (IIIrd & IVth year)
Control systems, Microprocessors, Power Electronics, Software systems, CMOS mixed mode analysis, Computer networks, Computer organization and architecture, Electronic Circuits I/II, Embedded system design, Low power digital IC, Operating Systems, Realtime computer control systems, SOC design.
8 bit breadboard computer using 74LSXX series IC's
I stumbled upon the idea of a SAP (simple as possible) breadboard computer while surfing Youtube one day and thought it would be a great idea to replicate the computer myself and improve upon the initial design. The computer is composed of 13 independent modules and can be programmed with basic machine language using the RAM dip switches to do simple math. Through this project, I learnt:
Timeline: December 2017 - February 2018                      
Category: Digital design, Computer architecture, ASIC
VISION BOT
Raspberry Pi powered, web controlled tank with vision capabilities
The primary objective of this project was to create an RC tank employing a PS3 controller, capable of providing live video streaming in order to monitor the entire home from a stationary base. I quickly realized however, that instead of using a seperate controller and a secondary device (such as tablet) for video feedback from the Pi camera, it would be economical to control the tank via just the tablet. The tank chassis motors are controlled with L293h IC and the pan & tilt servos are controlled and powered via GPIOs. Through this project, I learnt:
Creating custom PCBs using Eagle CAD
About Raspberry Pi and it's versatility
Designing mechanical parts in SolidWorks and error of margin
Python, HTML, CSS, Javascript, AJAX, Bash scripts, Linux libraries
Timeline: February 2018 - March 2018          
Category: Robotics, System design, Motors
WIFI AC SWITCH
Wifi enabled, economical 4-channel AC socket
This project was created with the intentions of aiding a physically disabled person. The relay box can simply be plugged into the AC wall socket and any appliance can then be connected to one of the four channels and be controlled online via web UI. The four channel relay board has an onboard Darlington transistor array so it can be triggered directly from the GPIO of the ESP8266 µController. Through this project, I learnt:
HTML, CSS, AJAX, Javascript, C++
About the ESP8266 which is a cheap, Wifi enabled microcontroller
Modeling parts in SolidWorks and creating an assembly to ensure design feasibility
Category: Digital design, Home automation, Web UI development
CNC PEN PLOTTER
An arduino controlled XY-axis pen plotter
In order to recycle discarded PCs in a creative way, I decided to design and create the pen plotter. The X and Y axis stepper motors came from the DVD drives in the CPU and I found the plexi-glass surface from a previously used fixture. Each stepper motor is controlled via an L293D IC and the servo motor is connected directly to the µController's GPIO. Through this project, I learnt:
to Create custom PCBs using Eagle CAD
Arduino C++ and Processing GUI for Arduino
Design mechanical parts in SolidWorks and error of margin
Timeline: May 2018 - June 2018                     
Category: Robotics, System design, Motors
PDG TOOL
Parametric Data Graphing Tool designed and built in NI LabVIEW
The testers created at Celestica append a Parametric log sheet sheet at the end of each run which contains the names of various tests and the values obtained per UUT. Customers sometime demand for a graphical representation of each test parameter which is tedious to deliver. Therefore, I was assigned with the task of creating a stand-alone processing tool which would take in the paramteric .CSV file and graph the user specified parameter. Through this project, I learnt:
to Create a LabVIEW windows application
Software documentation and comments format as per the industry standard
Timeline: May 2018 - July 2018                
Category: Automation, Software design
EMAIL PARSER
E-mail parser designed and built in Python 3.7
An important part of project management is to keep track of daily purchases with various vendors accurately. Since all the purchases I made at Celestica were through e-mail, I created an email parser to scan the inbox regularily for unread emails. Depeneding on the PO number mentioned in subject line, it would then parse the email date, body, subject and sender's email ID into a google spreadhseet in which each vendor had their own worksheet. Through this project, I learnt:
Second order Phase Locked Loop consisting of 4 stages
Phase locked loops are widely used to synchronize and synthesize frequencies in microelctronics. The above image is the open-loop response of a 10 MHz PLL designed as per the requirements of laboratory 2 for ELE 724 (CMOS Mixed-Mode Circuits) using TSMC 130nm technology in Cadence. A typical second order, 4 stage PLL consists of (1) Voltage Controlled Oscillator (2) Phase-Frequency Detector (3) Charge Pump and a (4) Loop Filter. The PFD detects the phase difference in between the reference voltage and sends an UP/DOWN signal to the CP accordingly. The CP, depending on the output of PFD, either sources or sinks the Control Voltage of the VCO which in turn decreases or increases the frequency of VCO output. Therefore, a PLL locks on to the phase of the input, not the frequency!
If UP = DOWN, Control Voltage = NC, VCO output frequency = NC                                                      
UP > DOWN, Control Votlage increases, VCO output frequency decreases                                      
4 bit Successive Approximation Analog to Digital Converter
A 4 bit SAR ADC was designed as per the requirements of laboratory 3 for ELE724 (CMOS Mixed-Mode Circuits) using TSMC 130nm technology in Cadence. 4 blocks: Sample/Hold circuit, Comparator, Successive Approximation Logic and Digital to Analog converter were independently designed and integrated to form the SAR ADC. The S/H block samples the input voltage when CLK = 1 and holds the voltage level when CLK = 0. The comparator compares the S/H output with DAC output. If S/H output > DAC output, the Comparator output = 1. The Comparator output is fed into the SAR logic which then generates the corresponding analog output of the input voltage. The analog bits are then fed into the charge scaling DAC which then outputs the voltage equivalent to input voltage. The figure above shows the input voltage and the respective output voltage generated by the SAR ADC. The simulation was run for 1.2 ms (transient analysis) in Cadence Virtuoso Analog Environment and took approximately 3 hours to execute.
An embedded entertainment center developed on NXP LPC1768 development board
A media center was designed and implemented on MCB1700 (LPC1768 development board) as a part of the final project for COE718 (Embedded System Design). The media center consists of three main applications: 1 game, MP3 player and a photo gallery. The image above is a snapshot of the game developed. The following peripherals were utilised in the project:
LCD
LEDs
Joystick
Potentiometer
Speaker
USB
All peripheral libraries were provided by the vendor. An interrrupt based approach was used to implement the system instead of using the RTX RTOS in order to gain bonus marks.
Timeline: November 2018 - December 2018
Category: Embedded System Design